VLSI stands for Very Large Scale Integration. In today’s world VLSI technology is widely used in various field of Engineering like Digital Signal Processing, Computers, Commercial Electronics, Automobiles, Medicine, Voice and Data Communication networks and many more. Here we shared Latest VLSI Projects for engineering students.

Latest VLSI Projects

  • Design and implementation of solar robot controlling and storage of energy based on FPGA
  • Design and implementation of area optimized 256-bit advanced encryption standard for real time images on FPGA
  • Design and VLSI implementation of high-end performance face- detection engine for mobile applications
  • Feature extraction of digital Aerial images FPGA based implementation of edge detection algorithms
  • Design and VLSI implementation of high-end performance face- detection engine for mobile applications
  • Design and implementation of adaptive filtering algorithm for noise cancellation in speech signal on FPGA
  • Hardware efficient architecture for Sine/Cosine waves
  • A novel architecture for VLSI implementation for RSA cryptosystem
  • Design and implementation of Read Solomon Decoder for 802.16 Network using FPGA
  • A dynamic partial reconfigurable FIR filter architecture
  • Fully parallel and fully serial architecture for realization of high speed FIR filters with FPGA’s
  • Design of Plural-Multiplier based on CODIAC Algorithm for FFT applications
  • Area efficient VLSI implementation for parallel-linear phase FIR digital filters of Odd length based on Fast FIR algorithm
  • Distributed arithmetic LMS adaptive filter implementation without look-up table
  • Design and implementation of floating point ALU on FPGA processor
  • Design and functional verification og I2C Master core using OVM
  • FPGA Design of an Fast 32-Bit Floating point multiplier unit
  • Design and simulation of 32-point FFT using Radix-2 Algorithm for FPGA implementation
  • A new approach for high performance and efficient design of CODIAC processor
  • IMPLMENTAION OF GENERALIZED DFT ON FIELD PROGRAMMABLE GATE ARRAY
  • DESIGN AND IMPLMENTATION OF DEMODULATION TECHNIQUE WITH COMPLEX DPLL USING CORDIAC ALGORITHM
  • FPGA implementation encoding for (15,k) Binary BCH code for VHDL and performance comparison for multiple error correction control
  • Area-time efficient scaling free- CORDIAC using generalized micro- rotation selection
  • Performance efficient FPGA implementation of parallel 2-D MRI image filtering algorithms using Xilinx System generator
  • VLSI implementation of Autocorreltaor and CODIAC algorithm for OFDM based WLAN
  • High speed ASIC design of complex multiplier using Vedic Mathematics
  • A novel LMS algorithm applied for adaptive noise cancellation
  • ADAPTIVE NOISE REDUCTION SCHEME FOR SALT AND PEPPER
  • Field programmable Gate Array implementation of Reed-Solomon Code RS(255,239)
  • AN EFFICIENT VITERBI DECODER
  • Fuzzy PID controllers using FPGA technique for real time DC motor speed control
  • FPGA synthesis of fuzzy(PD and PID) controller for Insulin pumps in Diabetes using Cadence
  • Design and FPGA implementation of IIR filter used for detecting clinical information from ECG
  • FPGA-based high-speed true random number generator for cryptographic applications
  • FPGA BASED RANDOM NUMBER GENERATION FOR CRYPTOGRAPHIC APPLICATIONS
  • Field programmable gate array implementation of parts-based object detection for real time video applications
  • A DISTRIBUTED CANNY EDGE DETECTCOR AND ITS IMPLMENTATION ON FPGA
  • Design and implementation of area optimized AES based on FPGA
  • FPGA based FFT algorithm implementation in WiMAX communication system
  • FPGA based CONTROL OF THERMOELECTRIC COOLERS FOR LASER DIODE TEMPERATURE REGULATION
  • Forward controller with FPGA based Self- tuning PID controller
  • Design and implementation of edge detection algorithm in dsPIC embedded processor
  • FPGA BASED DIRECT DIGITAL SYNTHESIS FUNATION GENERATOR
  • FPGA based area efficient edge detection filter for image processing applications
  • Design space exploration of sparse matrix-matrix multiplication on FPGA’s
  • FPGA implementation of Discrete Wavelength Transform(DWT) for JPEG 2000
  • DESIGN OF LOW POWER AND HIGH SPEED CONFIGURABLE BOOTH MULTIPLIER
  • A new VLSI architecture of parallel multiplier-accumulator based on Radix-2 modified Booth algorithm
  • A memory efficient and highly parallel architecture for variable block size integer motion estimation in H.264/AVC
  • Improvement of orthogonal code convolution capabilities using FPGA implementation
  • Image encryption based on AES key expansion
  • High throughput, lossless data compression on FPGA’s
  • FPGA implementations of the Humming bird cryptographic algorithms
  • Face detection and recognition based on skin color and depth information
  • BPSK system on Spartan 3E FPGA

If you need any further information about these projects kindly send your queries in the comment box.

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