Project title is DDR3 Based Lookup Circuit for High Performance Network Processing. Nowadays, Double Data Rate (DDR) SDRAMs are very famous in the PC memory market. They are widely used for the networking systems. These memory devices have high density and high memory bandwidth. Their price is very less. Due to complex instruction-based memory access control and high-speed interface technology, a specific purpose memory controller is required for optimizing the memory access trade off. Here, we proposed a specific purpose DDR3 controller for high-performance table lookup and corresponding lookup circuit based on the Hash-CAM approach. In network equipment, Content Addressable Memory (CAM) based techniques is used for fast table look up. CAM technology is better than Random Access Memory (RAM) technology. Because, CAM based lookup circuit’s technology is having better performance, lower cost and higher memory density.
In this project, we developed an advanced DDR3 memory controller architecture for the high-performance table lookup with a high performance Hash-CAM based lock-up circuit. It works very efficiently and its functionality is verified.
DDR3 Based Lookup Circuit for High Performance Network Processing
VHSIC Hardware Description Language (VHDL)
ModelSim XE III 6.4b is used for Simulation
XiLinx ISE 10.1 is used for Synthesis
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